TABLE OF CONTENTS This chapter discusses design details associated with FPGAs that affect board-level design and implementation decisions. FPGA devices differ significantly from the majority of fixed-function, fixed I/O devices mounted onto a printed circuit board (PCB). Application-specific standard product (ASSP) devices have fixed inputs, outputs, power and ground pins. The signal flow into and out of an ASSP device is fixed. With a fixed signal pin-out there are only a few effective device orientations on the board relative to other devices it interfaces with.
However, with an FPGA device almost all the signals can be assigned to any available I/O pin on the device. Exceptions include the device configuration pins and signals such as clocks that are dedicated for improved performance. Another difference is that I/O pin characteristics can also be configured by the design team. These options result in many decisions to be made during the course of an FPGA device design. The decisions regarding the FPGA I/O can be best made when considering the board-level circuitry surrounding the FPGA device. In order to make intelligent, well-considered I/O decisions, the design team must be aware of the details of every component or circuit the FPGA directly communicates with on the board.
In order to effectively assign signals to I/O locations, the design team must know the characteristics of each I/O signal including the required I/O standard, and any special board-level signal characteristics. All high-speed and controlled-impedance signals and differential signal pairs must be identified so they can be correctly...
