Chapter 3: Optimizing the Development Cycle
3.1 Overview
As in other specialized engineering disciplines, most successful FPGA design teams follow a defined design flow. The order and relationships between the required design steps are fixed for most projects. The highest level of the FPGA design flow starts with design specification and follows through to volume product manufacturing. Figure 3.1 illustrates the FPGA design flow at a high level.
Figure 3.1: FPGA Design Flow
In order to develop a system rapidly and efficiently, it is essential that an optimized design flow be adopted and then followed. This optimized design flow should help the design team remain focused on implementing the design tasks in the most efficient sequence possible. The design flow should require design reviews at appropriate design stages and should identify critical milestones and primary design phase objectives and the expected results. The optimized design flow should also highlight critical design decisions and encourage extra diligence when making these decisions.
The FPGA design flow is inherently iterative in nature. Almost all of the FPGA design cycle phases are iterative. Many design decisions will have significant influence on the efficiency of subsequent design stages, including FPGA family, device, language, tool and design hierarchy selections. Any increases in the time required to implement a design process may be multiplied many times over, since the affected design stages are likely to be within an iterated phase of the design cycle. The time required to move through each of the FPGA design phases depends heavily on the design specification, complexity,...