TABLE OF CONTENTS | 3DES | Triple Data Encryption Standard | |
| A/D | Analog-to-Digital Converter | |
| ABEL | Advanced Boolean Expression Language | |
| ADC | Analog-to-Digital Converter | |
| AES | Advanced Encryption Standard | |
| AGP | Accelerated Graphics Port | |
| AHDL | Altera (specific) Hardware Description Language | |
| AIM | Advanced Interconnect Matrix | |
| ALU | Arithmetic Logic Unit | |
| AMPP | Altera Megafunction Partners Program | |
| AN | Application Note | |
| APU | Altera Programming Unit | |
| ASIC | Application Specific Integrated Circuit | |
| ASSP | Application Specific Standard Product | |
| ATA | Advanced Technology Attachment | |
| ATCA | Advanced Telecom Computing Architecture | |
| ATM | Asynchronous Transfer Mode | |
| ATPG | Automatic Test Pattern Generation | |
| BGA | Ball Grid Array | |
| BiCMOS | Bipolar Complementary-Symmetry Metal Oxide Semiconductor | |
| BIST | Built-in Self-Test | |
| Bit | Contraction of Binary digiT | |
| BPSK | Biphase Shift Keying | |
| BRAM | Block RAM | |
| BSDL | Boundary Scan Description Language | |
| BSP | Board Support Package | |
| BST | Boundary Scan Test (IEEE 1149.9) | |
| CAD | Computer-Aided Design | |
| CAE | Computer- Aided Engineering | |
| CAM | Content Addressable Memory | |
| CAN | Controller Area Network | |
| CBGA | Ceramic Ball Grid Array | |
| CDIP | Ceramic Dual In-Line Package | |
| CDMA | Code-Division Multiple Access | |
| CDR | Clock Data Recovery | |
| CFB | Configurable Function Block | |
| CISC | Complex Instruction Set Computer | |
| CLB | Configurable Logic Block | |
| CLCC | Ceramic J-Leaded Chip Carrier | |
| CLD | Configurable Logic Devices | |
| CLE | Configurable Logic Element | |
| CLK | CLocK | |
| CMOS | Complementary Metal Oxide Semiconductor | |
| COTs | Commercial Off the Shelf | |
| CPGA | Ceramic Pin Grid Array | |
| CPLD | Complex Programmable Logic Device | |
| CPU | Central Processing Unit |
