TABLE OF CONTENTS This chapter presents some advanced FPGA I/O elements. There are no formal rules defining the I/O features that should be designated as "advanced." A general definition for advanced features might be, "Features that are typically available only within performance-optimized FPGA families." With the passage of time, the most popular "advanced" I/O features are added to the cost-optimized FPGA families and become categorized as standard features.
An example of a standard FPGA I/O feature is the ability to implement a medium-speed single-ended I/O standard. By comparison, higher-performance differential standards, high-performance advanced memory interfaces, high-speed data serial standards with built-in hardware support, and integrated high-speed signal transceivers could all be classified as advanced FPGA interconnect elements. While it may be argued that some elements of these advanced features are offered in different FPGA families, many of these features were limited or not available at all a few years ago. The critical point is that FPGA manufacturers will continue to enhance and expand existing I/O performance and options. Manufacturers will continue to improve the system-level performance of FPGA components and expand the range of supported applications.
Implementing a high-performance parallel or serial interface requires access to the appropriate mix of FPGA resources and IP. The lowest level of the FPGA interface is the signal interface: single-ended, differential, parallel or serial. For high-performance interfaces, differential and serial implementations are heavily used.
FPGA external device connectivity may be grouped into several categories, including chip-to-chip, board-to-board, multiboard (motherboard) and system/network connections.
