10.1 Overview

The three operational modes for an SRAM-based FPGA are pre-configuration, configuration and operational. After power-up a device remains in the pre-configuration mode until it has been initialized. During the configuration mode of operation, a bit stream is stored in a nonvolatile memory location and then transferred in blocks into the target FPGA device. Three common methods of configuring FPGA devices are synchronous serial, parallel and JTAG. Once the FPGA has been successfully configured, the device enters operational mode. For specific families and architectures it may also be possible to partially reconfigure the dovice. while it is running.

SRAM-based FPGA devices support in-system programming (ISP) capability. ISP refers to the ability to configure a programmable device on the target board without having to remove the device from the board to configure or reconfigure its functionality. Devices that do not support ISP must be configured before the device is placed on the board, One-time programmable (OTP) devices, such as anti-fuse based FPGAs, do not support ISP functionality.

The most common configuration sources for SRAM-based FPGAs are: an in-system discrete configuration memory (usually an OTP programmable read-only memory (PROM) or Flash memory device), an on-board or in-system processor with access to nonvolatile memory, or via a JTAG connection attached to a PC.

The discrete configuration memory (generally referred to as the "configuration memory" regardless of its technology) can be a PROM or Flash-based device; these devices are genet-ally ISP. There are also configuration PROMs that are OTP and not ISP.

FPGAs...