7.1 Introduction

The previous chapter was devoted to presenting the implementation of the HALOTIS logic timing simulator, whose main characteristic is that it implements the DDM model and the new inertial effect algorithm which were presented before. In that chapter we focused on presenting the technical characteristics of HALOTIS, its general structure, the simulation motor, and analysed its performance from the point of view of software application (speed in the generation of results, consumption of computer resources, etc.). In this chapter, though, we are interested in analysing the performance of HALOTIS from the point of view of the quality or reliability of the results it provides. Although these results depend to a certain extent on the technical characteristics of the tool, they basically reflect the precision of the delay model used in the simulation. That is, in this chapter we shall analyse the precision of the DDM model together with the inertial effect algorithm.

In order to carry out this analysis we shall develop a series of simulations using both the DDM model as well as the CDM model (see the previous chapter), and we shall compare these results with those obtained from the HSPICE electrical level simulator. The comparison with HSPICE will allow us to quantify the precision of the DDM model (the results from HALOTIS-DDM). The comparison with HALOTIS-CDM will in turn allow us to determine to what extent precision increases when degradation is included in the logic...