Itanium Architecture for Software Developers
This unique description of the Intel Itanium application architecture helps the software development community to use the power of Intel s new line of 64-bit processors.
TABLE OF CONTENTS Itanium Architecture for Software Developers
Chapter 6: Integer Computation, Character String, and Population Count Instructions
The previous chapter covered the Itanium processor s memory access and data transfer instruction groupings. This chapter covers the integer computation and character and population count instruction groupings. The following sections discuss the operation of each instruction and explain their use in some basic applications.
INTEGER COMPUTATION INSTRUCTION GROUPING
The integer execution units (I-units) provide a set of instructions to perform traditional software operations, such as arithmetic computations, logical decisions, shifts, bit-field manipulation, and acceleration of 32-bit data and pointer operations. To simplify the explanation of these operations, similar integer computation instructions are grouped together to form the following five categories:
-
Integer arithmetic instructions
-
Logical instructions
-
Large constant generating instructions
-
32-bit integer and 32-bit address pointer instructions
-
Shift and bit-field instructions
Either the I-unit or M-unit can actually execute the arithmetic, logical, and 32-bit acceleration instructions.
INTEGER ARITHMETIC INSTRUCTIONS
The integer arithmetic instruction subgroup has three base instruction types: add, subtract, and shift left and add. Table 6.1 identifies these instructions and gives their general formats. The Itanium processor s instruction set does not provide separate instructions to perform integer multiply and divide operations. However, the floating-point unit performs integer multiplication, division, and remainder operations. For this reason, these operations are introduced in a later chapter that covers the floating-point architecture.
Add Instructions
Depending on the type of operation performed and the operands selected, five different forms of the add instruction are available. The first form shown in Table 6.1 is:
(qp) add r1=r2,r3
| Mnemonic |
|---|
Copyright Intel Corporation 2000 under license agreement with Books24x7
