The Itanium architecture does not provide any integer divide or remainder operations, and these too are to be implemented by software. Intel provides some recommended algorithms that have been proved correct mathematically and designed to work efficiently. Integer division works by transferring the operands to floating-point registers, performing an approximate floating-point division, and truncating the answer before returning it to an integer register. The remainder operation is based on integer division; one more multiply-subtract is performed at the end.

The integer divide and remainder computations are not affected by the rounding mode set by the user in the FPSR main status field ( sf0). All floating-point operations use the reserved status field sf1, thus they are performed in register file size format (17-bit exponent, 64-bit mantissa) and rounded to nearest mode.

More efficient algorithms for short integers are also provided by Intel. The fastest algorithms are for 8-bit operands, and the slowest but most general for 64-bit operands. Also, 16-bit and 32-bit variants of intermediate speed are also provided. For 8- and 16-bit operands, the fastest algorithms use iterative subtraction instead of floating-point operations.

The Intel algorithms and assembly code are provided, at no cost, on-line as Divide, Square Root, and Remainder Algorithms for the IA-64 Architecture at http://developer.intel.com/software/opensource/numerics/.