Itanium Architecture for Software Developers
This unique description of the Intel Itanium application architecture helps the software development community to use the power of Intel s new line of 64-bit processors.
TABLE OF CONTENTS Itanium Architecture for Software Developers
Chapter 8: Multimedia Instructions
The part of the instruction set covered in Chapters 5 through 7 applies to a wide variety of software applications. This chapter covers a segment of the instruction set, multimedia instructions, that is targeted at a special application area, processing of multimedia data. Examples of important applications that require processing of multimedia data are graphics and some audio processing applications. The Itanium processor architecture includes multimedia instructions that perform parallel data processing. Addition of these special instructions to the ISA results in higher performance for multimedia applications. The multimedia instructions implemented in the Itanium architecture are semantically compatible with Intel MMX technology instructions and streaming SIMD extensions instruction technology.
MULTIMEDIA DATA STRUCTURES
Multimedia applications, such as audio and video, involve the processing of large arrays of independent elements of data. Figure 8.1(a) shows how multimedia data is organized in memory. These elements of data could represent digital samples of an audio signal.
The source and destination operands processed by the special multimedia instructions are always 64 bits wide. Notice in Figure 8.1(a) that this quad word can be organized as eight contiguous 8-bit-wide elements (8(8), four contiguous 16-bit-wide elements (4x16), or two contiguous 32-bit wide elements (2(32).
Figure 8.1: Little-endian Ordered Multimedia Parallel Data in Memory and Registers
Looking at the individual 8x8 elements, we see that they are identified as element 000, which is located at the lowest byte address, through 111, which is held at the highest byte address. The 4x16 data represents a data structure...
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