Itanium Architecture for Software Developers
This unique description of the Intel Itanium application architecture helps the software development community to use the power of Intel s new line of 64-bit processors.
TABLE OF CONTENTS Itanium Architecture for Software Developers
FLOATING-POINT COMPARE AND CLASS INSTRUCTIONS
In our study of the integer instructions of the instruction set, we found that the compare and test instruction performed conditional tests of information, and based on the result of this test, the operation set or reset predicate registers. Predicate registers are also written by the following instructions: floating-point register compare ( fcmp), floating-point class ( fclass), floating-point reciprocal approximation ( frcpa), and floating-point reciprocal square root approximation ( frsqrta). We covered the frcpa and frsqrta instructions in the earlier section on floating-point arithmetic instructions. Here the operations performed by the fcmp, fpcmp, and fclass instructions are examined.
Floating-point Compare Instructions
Two instructions perform floating-point comparison operations: floating-point register compare ( fcmp), and floating-point parallel register compare ( fpcmp). The fcmp instruction reads the values in source floating-point registers, performs a comparison test on these values, and based on the outcome of this comparison, writes two predicate registers. The general format of the floating-point compare instruction is:
(qp) fcmp.frel.fctype.sf p1,p2=f2,f3
Just like the integer compare instruction, a variety of different comparison operations are defined for fcmp, and they are defined by the completers status field ( .sf), floating-point relationship ( .frel), and floating-point comparison type ( .fctype).
For example, the instruction could be written as follows:
(p0) fcmp.eq p5,p6=f10,f11
Let us briefly look at the purpose of each of these completers. The .sf
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