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Communication Type:

Production Status:

Density:

Number of Words:

Bits per Word:

bits

Access Time:

Data Rate:

Data Set-up Time:

Data Hold Time:

Logic Family:

Supply Voltage:

Operating Current:

Standby Current:

Power Dissipation:

IC Package Type:

Screening Level:

Pin Count:

Operating Temperature:

Allow up to: overrange/margin
Use the overrange/margin to restrict your search to items whose full-scale range is close to your requirements.
(Overrange/margin requires both 'From' and 'To' values to work.)

Parallel Output?

Parallel Input?

Unidirectional?

Bidirectional?

Programmable Flags?

Help with FIFO Memory specifications:

Organization / Type
   Communication Type       
   Your choices are...         
   Synchronous       Refers to events that are synchronized, or coordinated, in time. For example, the interval between transmitting A and B is the same as between B and C.  Completion of the current operation occurs before the next one is started. In memory parlance synchronous refers to devices that use a clock. 
   Asynchronous       Refers to events that are not synchronized, or coordinated, in time. The following are considered asynchronous operations. The interval between transmitting A and B is not the same as between B and C. In memory parlance asynchronous refers to memory operations not requiring a clock. 
   Other       Other unlisted types. 
   Search Logic:      All products with ANY of the selected attributes will be returned as matches. Leaving all boxes unchecked will not limit the search criteria for this question; products with all attribute options will be returned as matches.
   Production Status       
   Your choices are...         
   Full Production       Devices are currently being manufactured. 
   Discontinued       Devices are no longer available from the manufacturer, but may still be found in the supply chain. 
   New Product       Devices are new products that have been announced by the manufacturer.  
   Other       Other unlisted status types. 
   Search Logic:      Products with the selected attribute will be returned as matches. Leaving or selecting "No Preference" will not limit the search criteria for this question; products with all attribute options will be returned as matches.
   Density       The capacity of the memory chip expressed in bits. 
   Search Logic:      All matching products will have a value greater than or equal to the specified value.
   Number of Words       The number of "rows" in the organization of the memory chip.  Each row stores a memory word and connects to a word line (one line of the memory bus) for addressing purposes. 
   Search Logic:      User may specify either, both, or neither of the "At Least" and "No More Than" values. Products returned as matches will meet all specified criteria.
   Bits per Word       The number of "columns" in the organization of the memory chip. Each column connects to a sense / write circuit (a bit), which connects to data input/output lines of the chip. 
   Search Logic:      User may specify either, both, or neither of the "At Least" and "No More Than" values. Products returned as matches will meet all specified criteria.
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Performance
   Access Time       A measurement of time in nanoseconds (ns) used to indicate the speed of memory. Access time is a cycle that begins the moment the CPU sends a request to memory and ends the moment the CPU receives the data it requested. Specifically, for a synchronous device it is the time, usually in ns, from a clock edge to when data is available at the output of a device. For an asynchronous device it is the time from the initiation of the read cycle to when the data output is available. 
   Search Logic:      All matching products will have a value less than or equal to the specified value.
   Data Rate       The transfer speed in hertz.  This is the number of bits per second that can be moved internally in the chip. 
   Search Logic:      All matching products will have a value greater than or equal to the specified value.
   Data Set-up Time       The minimum time interval required for the logic levels to be maintained constantly in the input lines prior to the triggering edge of the clock pulse in order for the levels to be reliably clocked into the memory.  
   Search Logic:      All matching products will have a value greater than or equal to the specified value.
   Data Hold Time       The minimum time interval required for the logic levels to remain on the inputs after the triggering edge of the clock pulse in order to be reliably clocked into the chip. 
   Search Logic:      All matching products will have a value greater than or equal to the specified value.
   Logic Family       
   Your choices are...         
   LV       Standard low voltage CMOS (LV). 
   L       Low Power (L) 
   CMOS 4000       CMOS 4000 refers to the 4000 series that is true CMOS with non-TTL levels. 
   Emitter Coupled Logic (ECL)       Emitter coupled logic (ECL) uses transistors to steer current through gates that compute logical functions. By comparison, TTL and related families use transistors as digital switches, where the transistors are either cut off or saturated, depending on the state of the circuit. This distinction explains ECL's chief advantage: that because the transistors are always in the active region, they can change state very rapidly, so ECL circuits can operate at very high speed; and also its major disadvantage: the transistors are continually drawing current, which means the circuits require high power, and thus generate large amounts of waste heat. ECL gates use differential amplifier configurations at the input stage. A bias configuration supplies a constant voltage at the midrange of the low and high logic levels to the differential amplifier, so that the appropriate logical function of the input voltages will control the amplifier and the base of the output transistor. The propagation time for this arrangement can be less than a nanosecond. Other noteworthy characteristics of the ECL family include the fact that the large current requirement is approximately constant, and do not depend significantly on the state of the circuit. This means that ECL circuits generate relatively little power noise, unlike many other logic types that typically draw far more current when switching than quiescent, for which power noise can become problematic. ECL circuits operate with negative power supplies, and logic levels incompatible with other families, which mean that interoperation between ECL and other designs, are difficult. The fact that the high and low logic levels are relatively close mean that ECL suffers from small noise margins, which can be troublesome in some circumstances. 
   Transistor-Transistor Logic (TTL)       Transistor-transistor logic (TTL) is a class of digital circuits built from bipolar junction transistors (BJT), diodes and resistors. It is notable, as it was the base for the first widespread semiconductor integrated circuit (IC) technology. All TTL circuits operate with a 5 V power supply. TTL signals are defined as "low" or L when between 0 V and 0.8 V with respect to the ground terminal, and "high" or H when between 2 V and 5 V. The first logic devices designed from bipolar transistors were referred to as standard TTL. The addition of Schottky diodes to the base collector of bipolar transistor was called Schottky logic (S-TTL). Schottky diodes shorten propagation delays within TTL by preventing the collector from going into what is called “deep saturation.”  Other TTL technologies include low-power Schottky (LS-TTL), advanced Schottky (AS-TTL), advanced low-power Schottky (ALS-TTL), and low-voltage TTL (LVTTL). 
   LCX       Low voltage CMOS (LCX) operates with 3 V or 5 V.  
   Search Logic:      Products with the selected attribute will be returned as matches. Leaving or selecting "No Preference" will not limit the search criteria for this question; products with all attribute options will be returned as matches.
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Power Characteristics
   Supply Voltage:       
   Your choices are...         
   -5 V       The chip operates with -5 volts. 
   -4.5 V       The chip operates with -4.5 volts. 
   -3.3 V       The chip operates with -3.3 volts. 
   -3 V       The chip operates with -3 volts. 
   1.2 V       The chip operates with 1.2 volts. 
   1.5 V       The chip operates with 1.5 volts. 
   1.8 V       The chip operates with 1.8 volts. 
   2.5 V       The chip operates with 2.5 volts. 
   2.7 V       The chip operates with 2.7 volts. 
   3 V       The chip operates with 3 volts. 
   3.3 V       The chip operates with 3.3 volts. 
   3.6 V       The chip operates with 3.6 volts. 
   5 V       The chip operates with 5 volts. 
   Other       Other unlisted supply voltages. 
   Search Logic:      All products with ANY of the selected attributes will be returned as matches. Leaving all boxes unchecked will not limit the search criteria for this question; products with all attribute options will be returned as matches.
   Operating Current       The minimum current needed for active chip operation. 
   Search Logic:      All matching products will have a value less than or equal to the specified value.
   Standby Current       The minimum current needed for the operation of the chip while it is inactive. 
   Search Logic:      All matching products will have a value less than or equal to the specified value.
   Power Dissipation       Power dissipation is the total power consumption of the device. It is generally expressed in watts or milliwatts. 
   Search Logic:      All matching products will have a value less than or equal to the specified value.
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Packaging Information
   IC Package Type       
   Your choices are...         
   BGA       Ball-grid array (BGA) places output pins in a solder ball matrix. Generally, BGA traces are fabricated on laminated (BT-based) substrates or polyimide-based films. Therefore, the entire area of substrates or films can be used to route the interconnection. BGA has another advantage of lower ground or power inductance by assigning ground or power nets via a shorter current path to PCB. Thermally enhanced mechanisms (heat sink, thermal balls, etc.) can be applied to BGA to reduce the thermal resistance. The sophisticated capabilities make BGA the desirable package to implement electrical and thermal enhancement in response to the need for high power and high speed ICs. 
   CSP       Chip scale package or chip size package (CSP) has an area that is no more than 20% larger than the built-in die. CSP is compact for second level packaging efficiency and encapsulated for second level reliability. CSP is superior to both direct-chip-attach (DCA) and chip-on-board (COB) technologies. CSP is used in a variety of integrated circuits (IC), including radio frequency ICs (RFIC), memory ICs, and communication ICs.   
   FLGA       Fine-pitch land-grid array (FLGA) is extremely compact and lightweight, making it suitable for miniature disc drives and digital cameras. 
   QFP       Quad flat packages (QFP) contain a large number of fine, flexible, gull wing shaped leads. Lead width can be as small as 0.16 mm. Lead pitch is 0.4 mm. QFPs provide good second-level reliability and are used in processors, controllers, ASICs, DSPs, gate arrays, logic, memory ICs, PC chipsets, and other applications.  
   TQFP       Thin quad flat package (TQFP). 
   SOP       Small outline package (SOP). 
   SOIC       Small outline integrated circuit (SOIC). 
   TSOP       Thin small outline package (TSOP) is a type of DRAM package that uses gull wing shaped leads on both sides. TSOP DRAM mounts directly on the surface of the printed circuit board. The advantage of the TSOP package is that it is one-third the thickness of an SOJ package. TSOP components are commonly used in small outline DIMM and credit card memory applications. Thin small outline package may be Type I or Type II. 
   SSOP       Shrink small outline package (SSOP). 
   TSSOP       Thin shrink small outline L-leaded package (TSSOP). 
   SOJ       Small outline J-lead (SOJ) is a common form of surface-mount DRAM packaging. It is a rectangular package with J-shaped leads on the two long sides of the device. 
   PLCC       Plastic leaded chip carrier (PLCC). 
   LCCC       Leadless ceramic chip carrier (LCCC). 
   DIP       Dual in-line package (DIP) is a type of DRAM component packaging. DIPs can be installed either in sockets or permanently soldered into holes extending into the surface of the printed circuit board. 
   SIP       Single in-line package (SIP). 
   Other       Other unlisted, specialized, or proprietary IC packages. 
   Search Logic:      Products with the selected attribute will be returned as matches. Leaving or selecting "No Preference" will not limit the search criteria for this question; products with all attribute options will be returned as matches.
   Screening Level       
   Your choices are...         
   Commercial       Devices support a temperature range and feature mechanical and electrical specifications that are suitable for commercial applications. 
   Industrial       Devices support a temperature range and feature mechanical and electrical specifications that are suitable for industrial applications. 
   Military       Devices support a temperature range and feature mechanical and electrical specifications that are suitable for military applications. 
   Other       Other unlisted screening levels. 
   Search Logic:      All products with ANY of the selected attributes will be returned as matches. Leaving all boxes unchecked will not limit the search criteria for this question; products with all attribute options will be returned as matches.
   Pin Count       The number of pins in package or module. 
   Search Logic:      User may specify either, both, or neither of the "At Least" and "No More Than" values. Products returned as matches will meet all specified criteria.
   Operating Temperature:       This is the full-required range of ambient operating temperature. 
   Search Logic:      User may specify either, both, or neither of the limits in a "From - To" range; when both are specified, matching products will cover entire range. Products returned as matches will meet all specified criteria.
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Features
   Parallel Output       The device outputs (read) bits in groups. 
   Search Logic:      "Required" and "Must Not Have" criteria limit returned matches as specified. Products with optional attributes will be returned for either choice.
   Parallel Input       The device accepts (write) bits in groups. 
   Search Logic:      "Required" and "Must Not Have" criteria limit returned matches as specified. Products with optional attributes will be returned for either choice.
   Unidirectional       The data movement is in one direction only. 
   Search Logic:      "Required" and "Must Not Have" criteria limit returned matches as specified. Products with optional attributes will be returned for either choice.
   Bidirectional       The data movement is in both directions. 
   Search Logic:      "Required" and "Must Not Have" criteria limit returned matches as specified. Products with optional attributes will be returned for either choice.
   Programmable Flags       The device has programmable flags to perform certain types of operations. 
   Search Logic:      "Required" and "Must Not Have" criteria limit returned matches as specified. Products with optional attributes will be returned for either choice.
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