TABLE OF CONTENTS The majority of the material covered in previous chapters has been general in its concepts, and has not specifically considered certain families of circuits or circuit architectures. The self-test considerations of the previous chapter, for example, did not involve any specific circuit structure or layout in the core logic or sequential (storage) networks, apart from the requirement in the majority of cases to separate the combinational logic elements from the sequential elements.
However, in this chapter we will consider particular circuits and circuit architectures, and how they may be tested. The fundamental principles of digtal logic testing will still be relevant, but specific fault mechanisms, circuit failures and/or testing procedures may now be involved. Additionally, many of the required test procedures will have been considered in detail by the IC manufacture (vendor), and therefore the OEM will not have the problem of formulating tests for such circuits from scratch as may be necessary with a system assembly of simpler ICs or other components-the problem of accessibility of the I/Os of such circuits for test purposes in a completed system assembly will, of course, still be present.
The main areas which will be considered in the following pages are:
microprocessors and memory;
programmable logic devices;
cellular arrays.
Memory is an essential part of all processor-based systems; both RAM and ROM have very strongly structured architectures, the testing of which is crucial to the performance of the processor system. Similarly, programmable logic devices have distinctive silicon layouts which, like cellular...
