TABLE OF CONTENTS Increasing complexity in the design of VLSI circuits has led to the introduction of high-level hardware description languages (HDLs) for the design phase. The evolving international standard is VHDL, the very high speed integrated circuit hardware description language, originally developed in 1983 as a language for documenting the circuit action of VLSI circuits and subsequently enhanced to become a design tool as well as a documentation record. Details of VHDL may be found in several publications [112] [113] [114]. It is, therefore, appropriate that VHDL should be considered as a means of incorporating some form of self test for the circuits being designed during the design phase.
A number of other HDLs and expert systems have been used for VLSI design and test specification activities, although most have been applied to improve the efficiency of ATPG programs rather than to build in any self-test mechanism. Details of many of these, including SUPERCAT [115], HITEST [116], CATA [117], TDES [118], IDT [119] and others may be found reviewed and referenced in Russell and Sayers [74]. However, here we will comment principally on VHDL and its potential use in self test, since this generally represents the most active basis outside certain commercial enterprises.
The VHDL language provides a hierarchical top-down design environment from behavioural level through architectural level and register transfer level down to macro, gate or other primitive level, using a common database throughout. The VHDL descriptions of...
