TABLE OF CONTENTS In considering the techniques that may be used for digital circuit testing, two distinct philosophies may be found, namely:
to undertake a series of functional tests and check for the correct (faultfree) 0 or 1 output response (s);
to consider the possible faults that may occur within the circuit, and then to apply a series of tests which are specifically formulated to check whether each of these faults is present or not.
The first of the above techniques is conventionally known as functional testing. It does not consider how the circuit is designed, but only that it gives the correct outputs during test. This is the only type of test which an OEM can do on a packaged IC when no details of the circuit design and silicon layout are known.
The second of the above techniques relies upon fault modelling. The procedure now is to consider faults which are likely to occur on the wafer during the manufacture of the ICs, and compute the result on the circuit output(s) with and without each fault present. Each of the final series of tests is then designed to show that a particular fault is or is not present. If none of the chosen set of faults is detected then the IC is considered to be fault free.
Fault modelling relies upon a choice of the types of fault(s) to consider in the digital circuit. It is clearly impossible to consider every conceivable imperfection which may be present, and...
