Digital Circuit Design with an Introduction to CPLDs and FPGAs

The toggle (T) flip flop is a single input version of the basic JK flip flop, that is, the T flip flop is obtained from the basic JK flip flop by connecting the J and K inputs together where the common point at the connection of the two inputs is designated as T, and it is shown in Figure 8.8 and its characteristic table in Table 8.5.
| Input | Present State | Next State |
|---|---|---|
| T | Q n | Q n+1 |
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
The characteristic table of Table 8.5 indicates that the output state changes whenever the input T is logic 1 and the clock pulse is High.