TABLE OF CONTENTS This appendix provides a brief overview of the Verilog Hardware Description Language (HDL). Like VHDL which we introduced in Appendix B, Verilog is a programming language used to describe a digital system and its components. Our discussion focuses on the use of Verilog HDL at the architectural or behavioral levels, and design at the Register Transfer Level (RTL).
Verilog HDL is a Hardware Description Language (HDL). A Hardware Description Language is a language used to describe a digital system, such as a CPU or components such as an ALU. Moreover, a digital system may be described at several levels. For instance, an HDL might describe the layout of the interconnecting wires and components such as gates and flip flops. Verilog can also be used to describe the registers and the transfers of vectors of information between registers. This is called the Register Transfer Level (RTL) [*]. Verilog supports all of these levels. However, this handout focuses on only the portions of Verilog which support the RTL level.
Both Verilog and VHDL are used extensively in industry and academia. While there are many similarities between these two programming languages, Verilog resembles the C programming language whereas VHDL resembles the Ada programming language.
Verilog [ ] was introduced in 1985 by Gateway Design System Corporation, now a subsidiary of Cadence Design Systems. Originally, Verilog HDL was a proprietary language of Cadence, but now it is open in the public domain. Verilog HDL allows a hardware designer to describe...
