Digital Circuit Design with an Introduction to CPLDs and FPGAs

8.9: Conversion from One Type of Flip Flop to Another

8.9 Conversion from One Type of Flip Flop to Another

By modifying the inputs of a particular type of a flip flop, we can be converted it to another type. The following example illustrates the procedure.

Example 8.1

Construct a clocked JK flip flop which is triggered at the positive edge of the clock pulse from a:

  1. clocked SR flip flop consisting of NOR gates

  2. clocked T flip flop

  3. clocked D flip flop

Solution:

We must determine how the inputs of the given flip flop must be modified so that it will behave as a JK flip flop. We begin with the construction of the transition tables shown in Table 8.6 where X denotes a don't care condition.

Table 8.6: Transition table for conversion among the four types of flip flops

Flip Flop Type

SR

JK

D

T

Q n

Q n+1

S

R

Q n

Q n+1

J

K

Q n

Q n+1

D

Q n

Q n+1

T

0

0

0

X

0

0

0

X

0

0

0

0

0

0

0

1

1

0

0

1

1

X

0

1

1

0

1

1

1

0

0

1

1

0

X

1

1

0

0

1

0

1

1

1

X

0

1

1

X

0

1

1

1

1

1

0

From the transition table of Table 8.6 we add Columns (1), (2), and (3) to the characteristic table of the JK flip flop as shown in Table 8.7.

Table 8.7: Characteristic table for...