Digital Integrated Circuit Design from VLSI Architectures to CMOS Fabrication

As stated in section 2.3.4, DDGs are not concerned with the granularity of operations and data. Recall, for instance, figs. 2.14 and 2.34a that describe the same block cipher at different levels of detail. As a consequence, the techniques of iterative decomposition, pipelining, replication, timesharing, algebraic transform, retiming, loop unfolding, and pipeline interleaving are not limited to any specific level of abstraction although most examples so far have dealt with operations and data at the word level, see table 2.10.
| Level of abstraction | Granularity | Relevant items | |
|---|---|---|---|
| Operations | Data | ||
| Architecture | ? | subtasks, processes | time series, pictures, blocks |
| Word | ? | arithmetic/logic operations | words, samples, pixels |
| Bit |
| gate-level operations | individual bits |
Things are pretty obvious at this higher level where granularity is coarse. As an example, fig. 2.36 gives a schematic overview of a visual pattern recognition algorithm. Four subtasks cooperate in a cascade with no feedback, namely preprocessing, image segmentation, feature extraction, and object classification.
In a real-time application, one would definitely begin by introducing pipelining because four processing units are thereby made to work concurrently at negligible cost. In addition, each unit is thus dedicated to a specific subtask...