IC Mask Design: Essential Layout Techniques

Chapter 1: Digital Layout

Chapter Preview

Here's what you're going to see in this chapter:

  • Close look at automated layout software

  • Why automated layout only works with certain cells

  • Knowing the circuit really does what it should

  • How to know in advance if your floorplan choice is good

  • Automated programs getting stuck

  • Troubleshooting tips

  • Which nets to wire first

  • Which nets to wire by hand

  • Techniques to guarantee rule-perfect layout

  • Flowchart of digital layout procedures

  • Lots of feedback loops

  • How to keep the power moving through big cells

  • Chicken or egg wiring and timing circle

  • Did you really build what you designed?

  • How to build quickie chips for testing

Opening Thoughts on Digital Layout

The majority of integrated circuits built today are large. I mean really huge CMOS digital chips. One chip might have literally millions of transistors in it. It's beyond any single mask designer's capabilities to lay out a chip like that by hand-in any reasonable time frame, at least. Consequently, the majority of large digital chips are laid out with the assistance of computer-aided tools.

Understanding how these automated digital layout tools operate allows you to develop skillful daily habits in your work-even in your analog work. If you understand how the software operates, you can lay out better circuits faster, compensate for software inadequacies, and steer clear of roadblocks before they happen.

Design Process

Let's build a digital chip. In this chapter, we will follow...

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Category: Electronic Design Automation (EDA) and Electronic Computer-aided Design Software (ECAD)
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