IC Mask Design: Essential Layout Techniques

Chapter 10: Verification

Chapter Preview

Here's what you're going to see in this chapter:

  • So, you think your layout is finished, do you?

  • How to automate checking for thousands of design rules

  • How to automate checking for a correct layout

  • How layout-checking programs find your devices

  • How to use the checking programs

  • How to problem solve difficult errors

  • How to read and write basic checking programs

  • Why you should read and write checking programs

  • How computers talk to you about your components

Opening Thoughts on Verification

Up until now we have just agreed that there are lots of design rules, maybe thousands. We have not told you how to make sure you have cleared each and every one. Even the most diligent person in the world is going to miss something somewhere with all those detailed rules, all those components and all those wires.

You only need one teeny, tiny, little mistake to completely kill your chip. With cycle times in a typical wafer fab taking 8 to 12 weeks, and a wafer costing thousands of dollars, you want to make sure that what you commit to silicon is correct.

To help us watch all our rules, most tools nowadays have computer-aided rule and layout checkers. You somehow enter all of the thousands of rules into the software. The computer goes away and checks your layout against these rules for you.

The computer makes sure that your metals are not too close to each...

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