TABLE OF CONTENTS The model of the stored charges in the MOS structure developed in the previous section is somewhat idealized. Thus, the real C-V curves are not exactly as we have presented them. Nevertheless, with slight modifications to the equivalent capacitive circuit of the MOS structure it is possible to obtain a fair fit of real C-V curves. Three main nonidealities may be included: at the interface, in the gate material, and in the semiconductor.
Traps, previously mentioned in Section 2.2, refer to energy levels generated by imperfections within the semiconductor crystal [14], [35], allowed for the carriers in the forbidden energy gap of the semiconductor. These energy levels can change their charge state by exchange of carriers with the semiconductor [8], [14], [35]. Clearly, an interface is a huge defect in a periodic crystal, and interface traps are always present. These traps interact with the conduction band by capturing or emitting electrons and with the valence band by capturing or emitting holes [14]. To derive a compact model of the MOS capacitance that accounts for interface traps, it is usually considered that the number of interface traps 
(V -1-cm -2) per unit potential [3] per unit area is constant. As shown in annex G, in inversion, the occupancy of the interface traps is determined by the position of the quasi-Fermi level of the minority carriers. The total charge density stored at the...
