VHDL: Programming By Example, Fourth Edition
No matter what your current level of expertise, nothing will have you writing and verifying concise, efficient VHDL descriptions of hardware designs as fast or as painlessly as this classic tutorial.
TABLE OF CONTENTS VHDL: Programming By Example, Fourth Edition
Appendix A: Standard Logic Package
This is a copy of the IEEE 1164 standard logic package. It is used in all of the examples in the book and is listed here for reference.
<b class="bold">-- ----------------------------------------------------------------------------------</b><b class="bold">--</b><b class="bold">-- Title : std_logic_1164 multi-value logic system</b><b class="bold">-- Library : This package shall be compiled into a</b><b class="bold">-- : library symbolically named IEEE.</b><b class="bold">-- :</b><b class="bold">-- Developers : IEEE model standards group (par 1164)</b><b class="bold">-- Purpose : This package defines a standard for</b><b class="bold">-- : designers to use in describing the</b><b class="bold">-- : interconnection data types used in vhdl</b><b class="bold">-- : modeling.</b><b class="bold">-- :</b><b class="bold">-- Limitation : The logic system defined in this</b><b class="bold">-- : package may be insufficient for</b><b class="bold">-- : modeling...
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