TABLE OF CONTENTS As we've seen, the Cortex-M3 processor has registers R0 R15 and a number of special registers. R0 R12 are general purpose, but some of the 16-bit Thumb instructions can only access R0 R7 (low registers), whereas 32-bit Thumb-2 instructions can access all these registers. Special registers have predefined functions and can only be accessed by special register access instructions.
The R0 R7 general-purpose registers are also called low registers. They can be accessed by all 16-bit Thumb instructions and all 32-bit Thumb-2 instructions. They are all 32-bit; the reset value is unpredictable.
The R8 R12 registers are also called high registers. They are accessible by all Thumb-2 instructions but not by all 16-bit Thumb instructions. These registers are all 32-bit; the reset value is unpredictable.
R13 is the stack pointer. In the Cortex-M3 processor, there are two stack pointers. This duality allows two separate stack memories to be set up. When using the register name R13, you can only access the current stack pointer; the other one is inaccessible unless you use special instructions MSR and MRS. The two stack pointers are:
Main Stack Pointer (MSP), or SP_main in ARM documentation: This is the default stack pointer; it is used by the OS kernel, exception handlers, and all application codes that require privileged access.
Process Stack Pointer (PSP), or SP_process in ARM documentation: Used by the base-level application code (when not running an exception handler).
