Running a System with Two Separate Stacks

One of the important features of v7-M architecture is the capability to allow the user application stack to be separated from the privileged/kernel stack. If the optional MPU is implemented, it could be used to block user applications from accessing kernel stack memory so that they cannot crash the kernel by memory corruption.

Typically, a robust system based on the Cortex-M3 has the following properties:

• Exception handlers using MSP

• Kernel code invoked by a SYSTICK exception at regular intervals, running in the privileged access level for task scheduling and system management

• User applications running as threads with the user access level (nonprivileged); these applications use PSP

• Stack memory for kernel and exception handlers is pointed to by the MSP, and the stack memory is restricted to privileged accesses only if the MPU is available

• Stack memory for user applications is pointed to by the PSP

Assume that the system memory has an SRAM memory. We could set up the MPU so that the SRAM is divided into two regions for user and privileged access. Each region is used by application data as well as stack memory space. Since stack operation in the Cortex-M3 is full descending, the initial value of stack pointers needs to be pointed to the top of the regions.

Figure 12.1: Example Memory Use with Privileged Data and User Application Data

After power-up, only the MSP is initialized (by fetching address 0x0 in the power-up sequence). Additional steps are required...