Appendix B: Glossary

ASIC: Application-specific integrated circuit.
ATM: Asynchronous Transfer Mode.
ATPG: Automatic test pattern generation.
BFM: Bus-functional model.
CAD: Computed aided design.
CPU: Central processing unit.
CRC: Cyclic redundancy check.
CTS: Clear to send.
DFT: Design for test.
DFV: Design for verification.
DSP: Digital signal processing.
DTR: Data terminal ready.
EDA: Electronic design automation.
EPROM: Erasable programmable read-only memory.
FAA: Federal aviation agency (US government).
FCS: Frame check sequence (ethemet).
FIFO: First in, first out.
FPGA: Field-programmable gate array.
FSM: Finite state machine.
GB: Gigabytes.
Gb: Gigabits.
GMII: Gigabit Medium-Independent Interface (ethemet)
ID: Identification.
HDL: Hardware description language
HEC: Header error check (ATM).
HVL: Hardware verification language.
IEEE: Institute of electrical and electronic engineers.
IP: Internet protocol, intellectual property
LAN: Local area network.
LFSR: Linear feedback shift register.
LLC: Link layer control (ethemet).
MAC: Media access control (ethemet).
Mil: Media independent interface (ethemet).
MPEG: Moving picture expert group.
NASA: National aeronautic and space agency (US government).
NNI: Network-network interface (ATM).
OO: Object-oriented.
OOP: Object-oriented programming.
OVL: Open verification library.
PC: Personal computer.
PCI: PC component interface.
PLL: Phase-locked loop.
RAM: Random access memory.
RGB: Red, green and blue (video).
ROM: Read-only memory.
RMII: Reduced Medium-Independent Interface (ethernet)
RTL: Register transfer level.
SDF: Standard delay file.
SDH: Synchronous digitial hierarchy (european SONET).
SMII: Serial Medium-Independent Interface (ethernet)
SNAP: (ethernet).
SOC: System on a chip.
SOP: Subject-oriented programming.
SONET: Synchronous optical network (north-american SDH).
UART: Universal asynchronous receiver transmitter.
UFO: Unidentified flying object.
UNI: User-network interface (ATM).
VHDL: VHSIC hardware description language.
VHSIC: Very...

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