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  • Wafer Backside Coating of Die Attach Adhesives
    . If the adhesive is in the form of a dry coating, the wafer can be sawn and individual dies picked and placed together with their adhesive. This eliminates variation in dispense quantity and location, and thus allows much more controlled fillet height and bond-line thickness. In turn, this allows
  • Failure Analysis of Die Bond Adhesion Failures Caused by Silicone Contamination
    used to mount the wafer during the die sawing operation. The analytical equipment and methodology used to determine the failure mechanism are described. Auger Electron Spectroscopy and X-ray Photoelectron spectroscopy are used to identify the elements and their chemical states on the die bonding
  • MICRO: Product Tech News
    The Simatic equipment control system (ECS) configures, starts up, operates, and monitors semiconductor cluster tools. The system includes hardware and software for planning, automation, start-up, and operation. It controls the progression of the wafer through the process chambers and simplifies
  • Evaluating the use of hard-mask films during bulk silicon etching
    in Figure 2. Because the silicon wafer becomes fragile after cavity etch, the cavities-last process is preferable from a manufacturing standpoint. Cavities-last etching also lends itself very well to etch-stop technology for diaphragm thickness control. However, the frontside of the wafer has
  • | Electronics Industry News for EEs & Engineering Managers
    Corp. is looking for funding from "new strategic investors " to help build its initial 8-inch wafer fab. An Apple move to Intel chips? It's all talk, VARs say VARs said they're not swayed by the latest industry buzz that Apple is angling to switch to Intel processors. FEI, Onami to devise

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