TABLE OF CONTENTS The basic thrust of PCI-X is to improve performance through enhancements to the PCI protocol. The objective is to make the transfer of large blocks of data more efficient. These enhancements include:
Provision for registered outputs and inputs such that data can be clocked directly out of a register and directly into a register. This requires that a device be allowed up to two clocks to respond to a change.
Tighter restrictions on wait states for both the initiator and target, and rules about when a transaction is allowed to disconnect.
PCI-X transactions include information about the identity of the initiator of a transaction as well as the total number of bytes remaining to be transferred. This allows for
The Split Transaction, which replaces the Delayed Transaction of PCI. A target that can't complete a transaction within the maximum latency responds with a Split Completion, effectively telling the initiator "I can't do this right now, I'll get back to you." Later, when the target is ready, it initiates the completion transaction back to the original initiator using information provided in the attribute phase of the original request. When executing a Split Completion, the target is referred to as the Completer.
Nevertheless, the fundamental protocol rules remain essentially the same. The essential nature and meaning of the "five brothers," FRAME#, DEVSEL#, IRDY#, TRDY# and STOP#, remains with only a few minor changes to accommodate the protocol enhancements.
