5.1 Hardware Description Languages

Design teams can use a hardware description language to design at any level of abstraction, from high level architectural models to low-level switch models. These levels, from least amount of detail to most amount of detail are as follows:

• Behavioral models

• Algorithmic

• Architectural

• Structural models

• Register Transfer Level (RTL)

• Gate level

• Switch level

These levels refer to the types of models that are used to represent a circuit design. The top two levels use what are called behavioral models, whereas the lower three levels use what are called structural models. Behavioral models consist of code that represents the behavior of the hardware without respect to its actual implementation. Behavioral models don't include timing numbers. Buses don't need to be broken down into their individual signals. Adders can simply add two or more numbers without specifying registers or gates or transistors. The two types of behavioral models are called algorithmic models and architectural models.

Algorithmic models simply represent algorithms that act on data. No hardware implementation is implied in an algorithmic model. So an algorithmic model is similar to what a programmer might write in C or Java to describe a function. The algorithmic model is coded to be fast, efficient, and mathematically correct. An algorithmic model of a circuit can be simulated to test that the basic specification of the design is correct.

Architectural models specify the blocks that implement the algorithms. Architectural models may be divided into blocks representing PC boards, ASICs, FPGAs, or...