TABLE OF CONTENTS As we have seen in Sec. 2.4, the linear model of the LPLL is valid only when the PLL is in the locked state. When the PLL is out of lock, its model becomes much more complicated and is nonlinear, of course. In this section we are going to develop a mathematical model that is valid in the unlocked state of the PLL. On the basis of that model, we will develop a mechanical analogy that is much simpler to analyze and will help us to derive the relevant parameters that describe the acquisition and lockout processes of PLLs.
The analogy should answer the following questions:
Under what conditions will the PLL get locked?
How much time does the lock-in process need?
Under what conditions will the PLL lose lock?
The mathematical model depends somewhat on the types of phase detectors and loop filters that are used in a particular PLL configuration. For the following analysis, we assume that the PLL contains a type 1 phase detector (multiplier) and a type 1 loop filter (passive lead-lag filter). It can be shown that the behavior of the PLL in the unlocked state is described by a nonlinear differential equation of the form4
| (2.67) |  |
This equation can be simplified. First, the substitutions of Eq. (2.41) are made for ? 1 and ? 2. Next, in most practical cases the inequality
| (2.68) |  |
holds. This leads...
