TABLE OF CONTENTS As we have seen in Chap. 2, the classical "digital PLL" (DPLL) is a semianalog circuit. Because it always needs a couple of external components, its key parameters will vary because of parts spread. Even worse, the center frequency of a DPLL is influenced by parasitic capacitors on the DPLL chip. Its variations can be so large that trimming can become necessary in critical applications. Many parameters are also subject to temperature drift and aging.
The all-digital PLL does away with these analog-circuitry headaches. In contrast to the older DPLL, it is an entirely digital system. Let us note first that the term digital is used here for a number of different things. First of all, digital means that the system consists exclusively of logical devices. But digital also signifies that the signals within the system are digital, too. Hence a signal within an ADPLL can be a binary signal (or "bit" signal), as was the case with the classical DPLL, but it can as well be a "word" signal, i.e., a digital code word coming from a data register, from the parallel outputs of a counter, and the like. When discussing the various types of ADPLL, we find the whole palette of such digital signals.
To realize an ADPLL, all function blocks of the system must be implemented by purely digital circuits. Digital versions of the phase detector are already known, but we now have to find digital circuits for the loop filter and...
