TABLE OF CONTENTS The mixed-signal PLL can be built in many variants, and the spectrum of applications is very broad as well. There are PLL applications in communications where the system is used to extract the clock from a (possibly noisy) information signal. In such an application, noise suppression is of importance. An entirely different application of the PLL is frequency synthesis. Here, reference noise is not of concern, but the synthesizer should be able to switch rapidly from one frequency to another; hence pull-in time is the most relevant parameter.
For these reasons it appears difficult to give a design procedure that yields an optimum solution for every PLL system. In this section we present a PLL design prcedure that is based on a flowchart, Fig. 2.49. To help in computing the relevant entities in the PLL design, the often used formulas for the PLL key parameters are listed in four tables, Tables 2.1 to 2.4. Table 2.1 shows the equations for hold range, lock range, etc., for a PLL using a type 1 phase detector. Table 2.2 presents the same information, but for an EXOR phase detector, etc.
The step-by-step design procedure of Fig. 2.49 should not be considered as a universal tool for the thousand and one uses of the PLL but rather as a series of design hints. Moreover, in many cases the design of a PLL will be an iterative process. We...
