TABLE OF CONTENTS In the age of microcontrollers and digital signal processors (DSPs) it is an obvious idea to implement a PLL system by software. When that is done, the functions of the PLL are performed by a computer program. The designer realizing a software PLL (SPLL) trades electronic components for microseconds of computation time. As the parts count for a hardware PLL increases with the level of sophistication, the number of computer instructions rises with the complexity of the required PLL algorithms.
Of course the SPLL can compete with a hardware solution only if the required algorithms are executing fast enough on the hardware platform that is used to run the program. If a given algorithm performs too slowly on a relatively cheap microcontroller (one of the popular 8051 family, for example) and the designer is forced to resort to more powerful hardware (e.g., a DSP), a price tradeoff also comes into play. The high speed and low cost of available PLL ICs makes it dificult for the SPLL to compete with its hardware counterpart. Nevertheless, SPLLs can offer particular advantages, especially when computing power is already available.
When comparing SPLLs with hardware PLLs, we should recognize first that an LPLL or a DPLL actually is an analog computer that continuously performs some arithmetic operations. When a computer algorithm has to take over that job, it must replace these continuous operations by a discrete-time process. From our previous discussion of hardware PLLs we know that every signal of...
