Phase-Locked Loops for Wireless Communications: Digital, Analog and Optical Implementations, Second Edition

| 2.1 | Solve y ?( t) = y( t) ? at. |
| 2.2 | Solve y ?( t) = b y( t) ? at 2. |
| 2.3 | Solve y ??( t) = y( t) ? a. |
| 2.4 | Solve y ??( t) = y ?( t) ? a y( t). |
| 2.5 | Find the inverse Laplace Transform for |
| 2.6 | Find the inverse Laplace Transform for |
| 2.7 | Find the Laplace Transform for f( t) = at 2 sin (2 ? f t). |
| 2.8 | For a first order phase-locked loop with: VCO: K o = 100 Hz/Volt, Phase Detector: Kd = 1/2 Volt/Radian Input Power: P=0.01 W, Loop Filter K f = 0.1 Input Phase Step = 1.0 Volts Find how long it takes for the phase-locked loop error voltage to be less than 20 ?Volts. |
| 2.9 | Power supply noise is often a problem for phase-locked loops. For the PLL of Problem 2.8, what is the error response of the phase-locked loop to a sinusoidal input of 30 mV at 60 Hz? |
| 2.10 | Derive the error response functions for the second order phase-locked loop with the passive loop filter. |
| 2.11 | For a second order active filter phase-locked loop with: VCO: K o = 100 Hz/Volt, Phase Detector: Kd = 1/2 Volt/Radian Input Power: P=0.001 W,... |