TABLE OF CONTENTS While the integrated circuit drives the packaging and assembly, the IC manufacturing process, and associated methodologies, serves as an invaluable technology resource. IC manufacturing is made up of a Front End and a Back End . The Front End encompasses the actual fabrication of the IC and is most often referred to as Wafer Fab . The Back End covers subsequent packaging, assembly, and testing of the IC. Many of the materials, the processes, procedures, and equipments, particularly those associated with the photolithography, have direct application to relevant packaging and assembly needs.
Areas of application for these types of methodologies supporting current and future IC packaging and assembly include:
Wafer bumping for TAB and flip chip,
Wafer Level Packaging (WLP) for Chip Scale Packages (CSP),
Interconnect Substrates for MCPs, and
Level 2 High Density Interconnects, HDI PWBs.
The IC photolithographic process and the above applications share the same basic technology for pattern transfer. The inherent advantages of much of the IC methodologies can best be assessed by first reviewing the various processes emphasizing some of the important lessons learned and secondly (and perhaps more importantly) their significance and impact on yields and cost-effective manufacturing.
An IC is fabricated in a wafer format. Multiple ICs are manufactured simultaneously on a single wafer. Today wafers are processed in 6", 8" and 12" diameters (Figure 2-1). When completed, a wafer can contain literally hundreds or thousands of ICs. Larger...
