HDL Programming Fundamentals: VHDL and Verilog
Teaching students the essentials of HDL and the functionality of the digital components of a system, this book includes several comprehensive projects to show HDL in practical application.
TABLE OF CONTENTS HDL Programming Fundamentals: VHDL and Verilog
4.1: HIGHLIGHTS OF STRUCTURAL DESCRIPTIONS
4.1 HIGHLIGHTS OF STRUCTURAL DESCRIPTIONS
Structural description is best implemented when the digital logic of the system's hardware components is known. An example of such a system is a 2x1 multiplexer. The components of the system are known: AND, OR, and invert gates. Structural description can easily describe these components. On the other hand, it is hard (if not impossible) to describe the digital logic of, say, hormone secretion in the blood; therefore, another description, such as behavioral or mixed, may be implemented. Structural description is very close to schematic simulation.
In this chapter, structural description is covered. Both gate-level and register-level descriptions are discussed for VHDL and Verilog.
Facts
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Structural description simulates the system by describing its logical components. The components can be gate level, such as AND gates, OR gates, or NOT gates; or components can be in a higher logical level, such as Register Transfer Level (RTL) or processor level.
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It is more convenient to use structural description rather than behavioral description for systems that required a specific design. Consider, for example, a system is performing the operation A + B = C. In behavioral description, we usually write C = A + B and we have no choice in the type of adders used to perform this addition. In structural description, we can specify the type of adders, for example, look-ahead adders.
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All statements in structural description are concurrent. At any simulation time, all statements that have an event are executed concurrently.
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A major difference between...
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