HDL Programming Fundamentals: VHDL and Verilog

In This Chapter
Learn how to use different types (styles) of descriptions to write HDL modules.
Learn which type or style of description to use for optimal writing style.
Understand the concept of packages in VHDL and how to use them.
Practice using real (floating) numbering systems.
Practice user-defined types.
Practice array use.
Practice using finite sequential-state machines.
Review and understand the steps needed to design and describe a basic computer.
In previous chapters, modules were written that focused on one type of description, such as data flow, behavioral, structural, or switch level. In this chapter, modules will use a mixture of more than one type of description. We call this style of writing, where different types of descriptions are used in the same module, "mixed-type descriptions." Modules representing complex systems are usually written using mixed-type descriptions.
Our definition of mixed-type description is that it is an HDL code that mixes different types of descriptions within the same module. In previous chapters, codes consisted mainly of one type, such as data flow (see Chapter 2, "Data-Flow Descriptions,"), behavioral (see Chapter 3, "Behavioral Descriptions"), structural (see Chapter 4, "Structural Descriptions"), or switch level (see Chapter 5, "Switch-Level Descriptions"). Here, we write our code using more than one type of description in the same module.
In fact, it is very common to write mixed descriptions, since each part of the system we model may be written best by a certain type of description. For example, consider...