HDL Programming Fundamentals: VHDL and Verilog

4.4: STATE MACHINES

4.4 STATE MACHINES

Synchronous sequential circuits are called "state machines." The main components of the state machine are latches and flip-flops; additional combinational components may also be present. Synchronous clock pulses are fed to all flip-flops and latches of the machine. There are two types of synchronous sequential circuits: Mealy and Moore circuits. The output or next state of Mealy circuits depends on the inputs and the present state of the flip-flops/latches. The output or next state of the Moore circuit depends only on the present states. Present state and next state for a particular flip-flop are the same pin (output Q). The current state is the value of Q just before the present clock pulse or edge; the next state is the value of Q after the clock pulse or the edge. To analyze a state machine, we perform the following steps:

  1. Determine the number of states. If the system is n-bit, then the number of flip-flops is n. The number of flip-flops here is calculated according to the "classical method," where the number of flip-flops is the minimum possible. Another method in which each state is represented by one flip-flop is frequently used because analysis of the system is easier than when using the classical method. For example, if the system is 3-bit, then the classical method requires three flip-flops, while the one flip-flop per state requires eight flip-flops. In this chapter, the classical method is implemented.

  2. Construct a state diagram that shows the transition between...

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