TABLE OF CONTENTS The SystemVerilog-2005 standard is an extension to the Verilog-2005 standard. As part of this extension, SystemVerilog adds several new keywords to Verilog. This appendix lists:
The original Verilog-1995 reserved keyword list
Additional reserved keywords in the Verilog-2001 standard
Additional reserved keywords in the Verilog-2005 standard
Additional reserved keywords in the SystemVerilog-2005 standard
The appendix also covers compiler directives in the Verilog-2005 standard that allow mixing models together that were written based on the reserved keywords from different generations of the Verilog and SystemVerilog standards.
Table B-1 lists the reserved keywords used in the Verilog language, as it was standardized by the IEEE in 1995.
| always | ifnone | rpmos |
| and | initial | rtran |
| assign | inout | rtranif0 |
| begin | input | rtranif1 |
| buf | integer | scalared |
| bufif0 | join | small |
| bufif1 | large | specify |
| case | macromodule | specparam |
| casex | medium | strong0 |
| casez | module | strong1 |
| cmos | nand | supply0 |
| deassign | negedge | supply1 |
| default | nmos | table |
| defparam | nor | task |
| disable | not | time |
| edge | notif0 | tran |
| else | notif1 | tranif0 |
| end | or | tranif1 |
| endcase | output | tri |
| endmodule | parameter | tri0 |
| endfunction | pmos | tri1 |
| endprimitive | posedge | triand |
| endspecify | primitive | trior |
| endtable | pull0 | trireg |
| endtask | pull1 | vectored |
| event | pullup | wait |
| for | pulldown | wand |
| force | rcmos | weak0 |
| forever | real | weak1 |
| fork | realtime | while |
| function | reg | wire |
| highz0 | release | wor |
| highz1 | repeat | xnor |
| if | rnmos | xor |
The IEEE 1364-2001 Verilog standard added several new keywords to the Verilog reserved keyword list. The additional keywords are listed in Table B-2.
