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The System Designer's Guide to VHDL-AMS: Analog, Mixed-Signal, and Mixed-Technology Modeling

Chapter 4: Composite Data Types and Operations

Now that we have seen the basic data types, natures and sequential operations from which the processes of a VHDL-AMS model are formed, it is time to look at composite data types. We first mentioned them in the classification of data types and natures in Chapter 2 . Composite data objects consist of related collections of data elements in the form of either an array or a record. We can treat an object of a composite type or nature as a single object or manipulate its constituent elements individually. In this chapter, we see how to define composite types and natures and how to manipulate them using operators and sequential statements.

4.1 Arrays

An array consists of a collection of values, all of which are of the same type or nature as each other. The position of each element in an array is given by a scalar value called its index. To create an array object in a model, we first define an array type in a type declaration. The syntax rule for an array type definition is

    array_type_definition <span class="unicode">?</span>        <b class="bold">array</b> ( discrete_range { , <span class="unicode"> </span> } ) <b class="bold">of</b> <i class="emphasis">element</i>_subtype_indication

This defines an array type by specifying one or more index ranges (the list of discrete ranges) and the element type or subtype.

Alternatively, to create an array terminal in a model, we first define an array nature in a...

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