The System Designer's Guide to VHDL-AMS: Analog, Mixed-Signal, and Mixed-Technology Modeling

Exercises

  1. [ 6.1] Write a declaration for a free quantity named control_voltage of subtype voltage with a tolerance group "control_voltage_tolerance" and an initial value of 3.5 V.

  2. [ 6.1/6.2] Write an entity declaration for a spring with two translational terminal ports and a quantity input port with temperature subtype.

  3. [ 6.2] Write a terminal declaration for circuit nodes node1 and node2 of electrical nature. Write a quantity declaration for an across quantity v_circuit and a through quantity i_circuit between the circuit nodes.

  4. [ 6.2] Write an entity declaration for a voltage supply with two electrical terminal ports vdd_positive and vdd_negative.

  5. [ 6.2] Write an entity declaration for a spring with terminal ports of translational nature.

  6. [ 6.2] Write a terminal declaration for an array of 36 temperature sensors, numbered 1 to 36. Write composite branch quantity declarations for the temperatures of all of the sensors and for the heat flows through sensors 13 to 24.

  7. [ 6.2] Write an array terminal declaration for the six pistons of an engine. Use a translational mechanical nature for the pistons.

  8. [ 6.2] Write a composite quantity declaration for the branch quantities position and stroke_force for the piston composite terminal of Exercise 7.

  9. [ 6.2] Rewrite the declaration of Exercise 7 as a record terminal.

  10. [ 6.3] Declare a terminal named hard_stop of a translation mechanical nature. Write a simultaneous statement that uses the 'reference attribute of the terminal to fix the hard stop's...

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