The System Designer's Guide to VHDL-AMS: Analog, Mixed-Signal, and Mixed-Technology Modeling

As illustrated throughout this book, the VHDL-AMS modeling language is extremely powerful and flexible for developing simulation models. Many tool vendors extend the power of VHDL-AMS even further by supporting the incorporation of SPICE models into the simulation environment.
In this appendix, the approaches taken by several tool vendors to incorporate SPICE models into their VHDL-AMS simulation environments are presented. Examples of these approaches are also illustrated.
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The SystemVision/ADMS simulation tools by Mentor Graphics allow SPICE circuits and models to be integrated into the VHDL-AMS environment in two ways. First, a VHDL-AMS model can include SPICE sub-circuits as components; second, a SPICE net-list can include VHDL-AMS design entities as components.
As an example, we will demonstrate the method for using a SPICE model of a 5-pin opamp as the core of a VHDL-AMS opamp. The SPICE opamp is a LMC6482A, and the VHDL-AMS entity is called opamp5. The opamp5 "VHDL-AMS on top" model is illustrated in Figure A-1.
<b class="bold">library</b> MGC_AMS; <b class="bold">use</b> MGC_AMS.eldo.<b class="bold">all</b>;<span class="unicode"> </span> -- <i class="emphasis">other lib declarations</i><b class="bold">entity</b> opamp5 <b class="bold">is</b> <b class="bold">port</b> ( <b class="bold">terminal</b> in_neg, in_pos, output, vcc, vee : electrical );<b class="bold">end</b> opamp5;-- <i class="emphasis">architecture that calls PSPICE model</i><b class="bold">architecture</b> LMC6482A <b class="bold">of</b> opamp5 <b class="bold">is</b> <b class="bold">component</b> PSPICE_OpAmp <b class="bold">is</b> <b class="bold">port</b> ( <b class="bold">terminal</b> INP, INM, VCC, VEE, VOUT : electrical ); <b...