The System Designer's Guide to VHDL-AMS: Analog, Mixed-Signal, and Mixed-Technology Modeling

Chapter 19: Guards and Blocks

In this chapter we look at a number of closely related topics. First, we discuss a new kind of resolved signal called a guarded signal . We see how we can disconnect drivers from such signals. Next, we introduce the idea of blocks in a VHDL-AMS design. We show how blocks and guarded signals work together with guards and guard expressions to cause automatic disconnection of drivers. Finally, we discuss blocks as a mechanism for describing a hierarchical structure within an architecture.

19.1 Guarded Signals and Disconnection

In Chapter 15 we saw how we can use resolved signals that include values such as 'Z' for modeling high-impedance outputs. However, if we are modeling at a higher level of abstraction, we may wish to use a more abstract type such as an integer type or a simple bit type to represent signals. In such cases, it is not appropriate to include the high-impedance state as a value, so VHDL-AMS provides us with an alternative approach, using guarded signals. These are resolved signals for which we can disconnect the drivers; that is, we can cause the drivers to stop contributing values to the resolved signal. We see why these signals are called "guarded" in the next section. First, let us look at the complete syntax rule for a signal declaration, which includes a means of declaring a signal to be guarded.

signal_declaration <span class="unicode">?</span>    <b class="bold">signal</b> identifier { , <span class="unicode"> </span> } : subtype_indication...

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