The System Designer's Guide to VHDL-AMS: Analog, Mixed-Signal, and Mixed-Technology Modeling

In Section 5.4 we described component instantiation statements in structural models and saw how to associate signals with signal ports. We can instantiate entities with quantity and terminal ports in the same way. We simply write a component instantiation statement naming the entity. In the port map, we can associate branch or free quantities with quantity ports, and terminals with terminal ports. We can use positional or named association, just as we did for signal ports. For example, suppose we declare the following terminals and a quantity in an architecture body:
<b class="bold">terminal</b> bridge1, bridge2 : electrical;<b class="bold">quantity</b> ambient : temperature;
Then we can instantiate the temperature-dependent resistor entity described on page 191 in a component instantiation statement:
resistor1 : <b class="bold">entity</b> work.temperature_dependent_resistor(linear_approx) <b class="bold">port map</b> ( n1 => bridge1, n2 => bridge2, temp => ambient );
In our discussion of digital structural descriptions, we mentioned that a component instantiation statement has the effect of creating a copy of the entity with the architecture body substituted for the instance. In the example above, the simultaneous statements are copied with the terminals bridge1 and bridge2 associated with the terminal ports n1 and n2, and the quantity ambient associated with temp. When the analog solver computes solutions, it will use the value of ambient as the quantity value in the equations. It will treat the terminal bridge1 and the terminal port n1 as equipotential regions, with the current branch from n1 contributing to the...