The Verilog Hardware Description Language, Fifth Edition
A valuable resource for engineers and students interested in modeling digital systems, this book takes a tutorial approach to presenting the major features of the language and its constructs.
TABLE OF CONTENTS The Verilog Hardware Description Language, Fifth Edition
Chapter 4: Concurrent Processes
Most of the behavioral modeling statements discussed to this point have been demonstrated using single process examples. These statements are part of the body of an always statement and are repetitively executed in sequential order. They may operate on values that are inputs or outputs of the module or on the module's internal registers. In this chapter we present behavioral modeling statements that by their definition interact with activities external to the enclosing always. For instance, the wait statement waits for its expression to become TRUE as a result of a value being changed in another process. As in this case and the others to be presented here, the operation of the wait statement is dependent on the actions of concurrent processes in the system.
4.1 Concurrent Processes
We have defined a process to be an abstraction of a controller, a thread of control that evokes the change of values stored in the system's registers. We conceive of a digital system as a set of communicating, concurrent processes or independent control activities that pass information among themselves. What is important is that each of these processes contains state information and that this state is altered as a function of the process' current inputs and present state.
Example 4.1 shows an abstract description of a computer. An implementation of the hardware controller for the process described in the always statement is a sequential state machine with output and next state logic. This state machine would control a data path that...
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