The Verilog Hardware Description Language, Fifth Edition
A valuable resource for engineers and students interested in modeling digital systems, this book takes a tutorial approach to presenting the major features of the language and its constructs.
TABLE OF CONTENTS The Verilog Hardware Description Language, Fifth Edition
Appendix A: A Tutorial Questions and Discussion
This appendix contains questions, answers, and discussion to accompany Chapter 1, the tutorial introduction. The goal of this appendix is to provide far more help and guidance than we could in Chapter 1. This appendix contains tutorial help for the beginning student and questions appropriate for use with an introductory course in digital systems design or computer architecture. The sections here are referenced from the sections of Chapter 1.
Some of the questions assume that the reader has access to a Verilog simulator the one included on the book's CD will suffice. A few of the questions assume access to a synthesis tool; limited access to one is available through the CD. Finally, the book's CD includes copies of the books examples; retrieve them from there to avoid retyping.
A.1 Structural Descriptions
The questions in this section accompany Section 1.1.2. The first two include a detailed presentation of how to develop a simple Verilog description, including a discussion of common mistakes. The questions following assume more familiarity with a hardware description language and simulator.
| 1.A | Write a Verilog description of the logic diagram shown in Figure A.1. This logic circuit implements the Boolean function F=(AB)+C which you can probably see by inspection of the K-map. Since this is the first from-scratch description, the discussion section has far more help. |
Do This Write a module specification for this logic circuit. The module will not have inputs or outputs. Use primitives gates (AND, OR, and NOT), connect them with wires,...
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