TABLE OF CONTENTS Signal integrity is the ability of a signal to generate correct responses in a circuit. Informally speaking, signal integrity indicates how clean or distorted a signal is. A signal with good integrity stays within safe (acceptable) margins for its voltage amplitude and transition time. For example, an input signal to a flip-flop with good integrity arrives on time to satisfy the setup/hold time requirements and does not have large undershoots that may cause erroneous logic readout or large overshoots that affect the transistor's lifetime.
Leaving the safe margins may not only cause failure in a system ( e.g., unexpected ringing) but also shorten the system's lifetime. The latter occurs because of the time-dependent dielectric breakdown (TDDB) [Hunter 1999] or injection of high-energy electrons and holes (also called hot carriers) into the gate oxide. Such phenomena ultimately cause permanent degradation of metal oxide semiconductor (MOS) transistors. To quantify these, systematic methods can be employed to perform the lifetime analysis and measure the performance degradation of logic gates under stress ( e.g., repeated overshoots) [Fang 1998].
Signal integrity depends on many internal ( e.g., interconnects, data, characteristics of transistors, power supply noise, process variations) and external ( e.g., environmental noise, interactions with other systems) factors. By using accurate simulation in the design phase, one can apply conservative techniques ( e.g., stretched sizing/spacing, shielding) to minimize the effect of integrity loss. There are interde-pendencies...
