TABLE OF CONTENTS Aside from noise-induced errors such as power supply noise and signal integrity, manufacturing faults caused by manufacturing defects and process variations can severely impact device (process) yield and DPM levels. An internal document from a foundry reports that when defect avoidance and defect tolerance schemes were employed for one 50-mm2 design at a 130-nm process node on an 8-inch fabrication line, the defect density was reduced from 0.2 to 0.1 defects per square inch, the device yield was increased from 85% to 92%, and there were 40 more good dies on one wafer (490 versus 450).
Fault-model-based (structural) tests, such as stuck-at tests and transition tests, have become the requirement for improving a device's fault coverage during manufacturing test. Studies have shown that stuck-at tests with 100% single stuck-at fault coverage could not guarantee perfect product quality ( i.e., no test escape) [McCluskey 2000] [Li 2002] [McCluskey 2004]. An investigation by [Ferhani 2006] further revealed that only 6% of the 483 defective ELFI8 chips contained defects that acted as single-stuck-at faults, whereas 18% of the 205 defective ELF35 chips and 35% of the 116 defective Murphy chips acted as single-stuck-at faults. The remaining defects were (1) timing-dependent, (2) sequence-dependent, or (3) attributed to timing-independent, non-single-stuck-at faults, such as multiple stuck-at faults or nonfeedback bridging faults. A timing-dependent defect is sequence dependent because timing dependence implies that a transition arrives either earlier or later than expected; these transitions are created by...
