Verilog Quickstart: A Practical Guide to Simulation and Synthesis in Verilog, 3rd Edition

USING WAVEFORMS

Waveforms are a great tool for visualizing both the values and the timing of circuits. Every Verilog simulator has a waveform tool. All these tools allow you to select signals to be written to the waveform display. Some allow interactive, marching waveform displays; others are only postprocessors that let you look at waveforms after simulation is complete. All waveform displays allow you to measure the distance between edges of signals. Consult the documentation for the tool set you are using for exact instructions on using a waveform tool.

This technique is limited by how much data you can analyze with a graphical waveform. All the data from a small circuit that runs for a short time can be displayed and analyzed in a waveform. There is usually too much data from a large simulation for effective graphical viewing and analysis.

Waveforms are the easiest way to verify the timing of critical signals. It is often much easier to analyze timing information with a graphical waveform than with a textual printout.

You can run a simulation and save a set of waveforms and then compare those waveforms to the waveforms from another simulation run. Graphical analysis of the differences between regression tests can be an easy way to see if a difference in test results is critical or acceptable.

Example 21-1: Initial Block to Create VCD Wave File
initial begin  $dumpfile("myfile.vcd"); // file name for wave data  $dumpvars(0,dut); // dump all starting at dut hierarchyend

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