Digital Electronics and Design with VHDL

Chapter 11: Combinational Logic Circuits

Overview

Objective: Chapters 1 to 10 introduced fundamental concepts, indispensable devices, basic circuits, and several applications of digital electronics. From this chapter on, we focus exclusively on circuit analysis, design, and simulation.

Digital circuits can be divided into two main groups, called combinational and sequential. The former is further divided into logical and arithmetic, depending on the type of function (i.e., logical or arithmetic) that the circuit implements. We start by studying combinational logic circuits in this chapter, proceeding to Combinational arithmetic circuits in the next, and then sequential circuits in the chapters that follow. This type of design (combinational logic) will be further illustrated using VHDL in Chapter 20.

Chapter Contents

11.1

Combinational versus Sequential Logic

11.2

Logical versus Arithmetic Circuits

11.3

Fundamental Logic Gates

11.4

Compound Gates

11.5

Encoders and Decoders

11.6

Multiplexer

11.7

Parity Detector

11.8

Priority Encoder

11.9

Binary Sorter

11.10

Shifters

11.11

Nonoverlapping Clock Generators

11.12

Short-Pulse Generators

11.13

Schmitt Triggers

11.14

Memories

11.15

Exercises

11.16

Exercises with VHDL

11.17

Exercises with SPICE

11.1 Combinational versus Sequential Logic

By definition, a combinational logic circuit is one in which the outputs depend solely on its current inputs. Thus the system is memory less and has no feedback loops, as in the model of Figure 11.1(a). In contrast, a sequential logic circuit is one in which the output does depend on previous system states, so storage elements are necessary, as well as a clock signal that...

UNLIMITED FREE
ACCESS
TO THE WORLD'S BEST IDEAS

SUBMIT
Already a GlobalSpec user? Log in.

This is embarrasing...

An error occurred while processing the form. Please try again in a few minutes.

Customize Your GlobalSpec Experience

Category: Arithmetic Logic Units (ALU)
Finish!
Privacy Policy

This is embarrasing...

An error occurred while processing the form. Please try again in a few minutes.