TABLE OF CONTENTS The generation of pseudo-random bit sequences is particularly useful in communication and computing systems. An example of application is in the construction of data scramblers (the use of scramblers was seen in Chapter 6, with detailed circuits shown in the next section) for either spectrum whitening or as part of an encryption system. In this type of application, the sequence must be pseudo-random, otherwise the original data would not be recoverable.
Pseudo-random sequences are normally generated using a circuit called linear-feedback shift register (LFSR). As illustrated in Figure 14.30(a), it consists simply of a tapped circular shift register with the taps feeding a modulo-2 adder (XOR gate) whose output is fed back to the first flip-flop. The shift register must start from a nonzero state so the initialization can be done, for example, by presetting all flip-flops to 1 (note in Figure 14.30(a) that the reset signal is connected to the preset input of all DFFs), in which case the sequence produced by the circuit is that shown in Figure 14.30(b) ( d = 0001001101011110 ). Because the list in Figure 14.30(b) contains all N-bit vectors (except for "0000"), the circuit is said to be a maximal-length generator. Figure 14.30 also shows, in (c), a simplified representation for the circuit in (a); this type of representation was introduced in Sections 4.11 and 4.13 and will again be employed in the next section.
